| Week, Date | Lecture | Reading | Assignments | Project Schedule |
| 1-1 Jan 13 |
Intro. and Project Information | Lab 1 assigned | Form project teams | |
| 1-2 Jan 15 |
CMOS Scaling | Chapters 2 & 1.6 | ||
| 2-1 Jan 20 |
CMOS Scaling | Define project and scope | ||
| 2-2 Jan 22 |
CMOS Scaling | Project Proposal Due Lab 1 due |
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| 3-1 Jan 27 |
CMOS Scaling | Lab 2 assigned | ||
| 3-2 Jan 29 |
Process Variation | Chapter 6 | ||
| 4-1 Feb 3 |
Process Variation | Lab 2 due | ||
| 4-2 Feb 5 |
Logic circuit styles | Chapters 7 & 8 | Algorithmic Model & Simulation | |
| 5-1 Feb 10 |
Logic circuit styles Exam 1 |
EXAM 1 | ||
| 5-2 Feb 12 |
Logic circuit styles | Golden validation model | ||
| 6-1 Feb 17 |
Logic circuit styles | Lab 3 assigned | ||
| 6-2 Feb 19 |
Asynchronous Design | Chapters 9 & 11 & handouts | Floorplan & hierarchy | |
| 7-1 Feb 24 |
Asynchronous Design | Lab 3 due Lab 4 assigned |
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| 7-2 Feb 26 |
Asynchronous Design Design "elevator talk" |
Preliminary Design Review Due | ||
| 8-1 Mar 3 |
Noise sources & analysis | Chapters 8.1-8.3 & 9.2 | ||
| 8-2 Mar 5 |
Noise sources & analysis | Lab 4 due Lab 5 assigned |
Behavioral model coded | |
| 9-1 Mar 10 |
Timing Verification | Chapter 23 | ||
| 9-2 Mar 12 |
Timing Verification | Behavioral model validated | ||
| 10-1 Mar 24 |
Exam 2 | EXAM 2 Lab 5 due |
Detailed floorplan | |
| 10-2 Mar 26 |
Design Review Presentations | Int. Design Report | RTL, synthesis, place, route | |
| 11-1 Mar 31 |
Low leakage design | Chapters 3 & 4 | one module done, design flow debugged | |
| 11-2 Apr 2 |
Low leakage design | |||
| 12-1 Apr 7 |
Low leakage design | RTL, synthesis, P&R 30% | ||
| 12-2 Apr 9 |
Interconnect & Inductance Exam 3 |
Chapters 16, 17 & 19.1-2 | EXAM 3 | |
| 13-1 Apr 14 |
Interconnect & Inductance | RTL, synthesis, P&R 100% | ||
| 13-2 Apr 16 |
Clocking, Synchronization & Metastability | Chapter 9 & 11 | Global design, power, clock | |
| 14-1 Apr 21 |
Packaging & power | Chapter 24 | Timing closure | |
| 14-2 Apr 23 |
Final Presentations Exam 4 |
Final Presentations EXAM 4 |
Layout verification | |
| 15-1 Apr 28 |
Final Presentations | Final Presentations | Tape Out | |
| 17-1 May 8 |
Final Report Due via E-Mail! |